1. Field of the Invention
The present invention relates to a receiver which can tune a reception frequency to a desired frequency, and more particularly to a receiver which reduces a period of time required by the reception frequency to stabilize at the desired frequency when the reception frequency is changed.
2. Description of the Related Background Art
A receiver for receiving modulated broadcast waves such as FM broadcast waves and AM broadcast waves, which can vary a tuning frequency, or a reception frequency by changing an oscillating frequency of a local oscillator arranged therein, tunes to a frequency of a desired broadcasting station, demodulates a modulated signal from a received radio signal, and outputs the demodulated signal. The local oscillator is provided for control setting the tuning frequency at a frequency of a broadcasting station to be selected. Generally, a frequency synthesizer using a PLL (Phase Locked Loop) circuit is known as the local oscillator.
In the frequency synthesizer, as illustrated in FIG. 1, a signal having a reference frequency fr and an output signal of a programmable divider 104 are supplied to a phase comparator 101. The phase comparator 101 detects the difference in phase between both the input signals and outputs an error pulse Eo indicative of the phase difference. The error pulse Eo output from the phase comparator 101 is smoothed by a low pass filter (LPF) 102 and then supplied to a voltage controlled oscillator (hereinafter abbreviated as "VCO") 103. The VCO 103 generates an oscillating signal having an oscillating frequency fo according to an output voltage VD of the LPF 102. The oscillating signal is output and then supplied to the programmable divider 104. The programmable divider 104 divides the oscillating signal from the VCO 103 by a frequency division ratio 1/Mi, and outputs the divided signal with frequency fv to the phase comparator 101. These components 101 to 104 form a loop. Therefore, the oscillating frequency fo by the VCO 103 is controlled by the error pulse Eo from the phase comparator 101, so that the oscillating frequency by the VCO 103 converges to a frequency to be set and then is maintained.
A frequency division value Mi in the programmable divider 104 is changed by a program input from a controller, not shown, in accordance with the frequency to be set when a reception frequency is changed, such that the oscillating frequency of the VCO 103 can be arbitrarily changed by changing the frequency division value Mi.
In the frequency synthesizer as mentioned above, the oscillating frequency fo of the VCO converges to an integer multiple of the reference frequency fr in principle. Therefore, tuning stability of a receiver adapted to receive broadcast waves at a tuning frequency based on the oscillating frequency fo is determined by the accuracy of the reference frequency fr.
Since the frequency synthesizer using a PLL circuit is required to satisfy several contradictory requirements such as stable operation of a loop system, a short time until phase lock is achieved (lock up time), less noise in the loop system when the phase is locked, and so on, a loop constant of the PLL circuit set by laying emphasis only on the lock up time would cause unstable operations of the loop system and result in an unpracticable frequency synthesizer.
For this reason, since conventional frequency synthesizers using a PLL circuit set a loop constant so as to satisfy the above-mentioned several requirements in a practically tolerable range, it is difficult to significantly reduce the lock up time. For changing a reception frequency, a demodulated output is attenuated by muting.